1. Field of the Invention
The present invention relates to a method for fabricating semiconductor devices. More particularly, the present invention relates to a method for depositing undoped silicate glass on a substrate.
2. Description of the Related Art
A principal component of undoped silicate glass is silicon dioxide (SiO2) which is commonly used as dielectric material in semiconductor processing. Silicon dioxide (SiO2) and silicon nitride (Si3N4) are the two prevalent dielectric material used in semiconductor processing. However, since the dielectric constant of silicon dioxide, which is about 3.9, is lower than that of silicon nitride, which is about 7.5, silicon dioxide is usually preferred for use as a insulation material between active regions or conductive lines.
Two prevalent reactive gases used for forming silicon dioxide by chemical vapor deposition (CVD) are silicon hydride (SiH4) and tetra-ethyl-ortho-silicate, (TEOS). Since the step coverage ability of TEOS is better, TEOS is preferred in semiconductor manufacture. Usually, TEOS and ozone (O3) are used together as reactive gases in an atmospheric-pressure chemical vapor deposition (APCVD) for depositing the undoped silicate glass to form shallow trench isolation (STI), inter-poly dielectrics (IPD) or inter-layer dielectrics (ILD). Thus, gap-filling ability of the undoped silicate glass is very important.
The gap-filling ability of a APCVD process using O3 and TEOS as etching gases is mainly determined by a specific process parameter: the O3/TEOS flow rate ratio. The smaller the O3/TEOS ratio, the higher the likelihood of a conformal undoped silicate glass film being formed, which does not benefit the gap-filling ability. The greater this ratio, the higher the likelihood of a flow-like undoped silicate glass film being formed, which is beneficial to the gap-filling ability. In an APCVD process for depositing undoped silicate glass film, the conventional range of values of O3/TEOS ratio is set between 14 and 17.
FIG. 1a shows conventional continuous-type APCVD deposition machine. Inside an APCVD processing station 100, a wafer or semiconductor substrate 102 is transported linearly into an APCVD chamber 108 for a deposition process. At the top of an APCVD chamber 108, injectors 107 spurt reactive gases downward. When the wafer 102 is right below the injector 107, the reaction product is deposited to cover the wafer 102 surface, which completes the chemical vapor deposition.
Using TEOS and ozone (O3) as reactive gases, the undoped silicate glass is deposited to form STI, IPD, ILD, etc. The wafer 102 is transported into the deposition station twice (known as 2-pass) to deposit undoped silicate glass thereon. When the wafer 102 is transported into the APCVD station to perform the second deposition, the wafer 102 is rotated 90 degrees.
FIG. 1b shows a conventional 2-pass APCVD method for depositing undoped silicate glass layers 110 into recessed region 103. The recessed region 103 can be a trench for a STI or a gap between a polysilicon layer and a conductive layer. When the fabrication technology is at 0.18 micrometers or even below 0.15 micrometers, the gap spacing is further narrowed. When using conventional method to deposit the undoped silicate glass 110, because the gap-filling ability is not good, key-hole voids 105 are usually formed in the recessed region 103.
As shown in FIG. 1a and FIG. 1c, the 2-pass APCVD process for depositing undoped silicate glass film 110 on a wafer or a semiconductor substrate 102 is now described in detail. The wafer 102 is linearly transported at a constant speed in the reaction chamber 108. The reactive gases 106 are spurted downward from the injector 107. Consequently, the reactive gases 108 are not uniformly distributed on the wafer 102. During the second deposition, although the wafer 102 is rotated 90xc2x0 with a reference notch 112 in the perimeter of the wafer 102, reactive gases 108 are still not distributed uniformly on the wafer 102. That leads to several problems as enumerated hereafter.
Since the substrate 102 remains inside the reaction chamber 108 too long, the deposited product is too thick. Therefore, the gap filling ability is affected, which leads to voids formation. As a result, the electrical insulating of devices is altered. In addition, in a subsequent etching-back process, the reactive gases contained in the voids are then released, which causes contamination of others semiconductor elements. Moreover, since the thickness of deposited undoped silicate layer is not uniform, the subsequent planarization process cannot be effectively performed.
Regarding this insufficient gap filling ability issue, several solutions have been proposed. These include increasing the temperature of the station, increasing the O3/TEOS ratio, and changing the deposition pressure. All these options have the same purpose of enhancing fluidity of the undoped silicate and increasing the gap filling ability. Although these solutions may reduce void occurrence in the isolation layer, the improvement of the deposition distribution is still limited. Moreover, those solutions cause many drawbacks, which are temperature increase, electrical isolation deficiency, throughput decrease, etc.
The invention provides a method for forming undoped silicate glass in substrate recessed regions that enhances uniformity of deposited layer thickness. The present invention provides a method for forming an undoped silicate glass layer wherein the CVD process is successively performed at least three times to deposit an undoped silicate glass layer in recessed regions of a semiconductor substrate. The recessed regions filled with undoped silicate glass form structures, comprising STI, or dielectric layers between a plurality of polysilicon layers or conductive layers. Keeping the deposition conditions including temperature, pressure, gas source, and a total thickness of the undoped silicate glass layer fixed, this method comprises increasing the number of passes of deposition performed on the substrate and decreasing the time of deposition inside a reaction chamber in order to reduce the thickness of the deposited undoped silicate glass. The gap filling ability then is enhanced and voids formation is prevented. The method also includes, before each deposition is performed, a clockwise or counter-clockwise rotation of the semiconductor substrate by a given angle so as that the semiconductor substrate rotates a total of 360xc2x0 or a multiple of 360xc2x0 by the last deposition. Therefore, the method allows a uniform deposition of undoped silicate glass upon the substrate.
According to a preferred embodiment of the present invention, under given conditions of deposition including temperature, pressure, gases source and for a total fixed thickness, the deposition on a substrate can be performed by 4 passes through a reaction chamber. At each pass, before the deposition is performed, the substrate is clockwise or counter-clockwise rotated 90xc2x0. Thus, after performing the fourth pass, the substrate has rotated an angle of 360xc2x0.
As embodied and broadly described herein, the invention provides the following features. Under given deposition conditions of temperature, pressure, gases source, and for a total fixed thickness, the number of passes for depositing is increased and the time of deposition inside the reaction chamber is shortened, which reduces the thickness of deposited layer at each pass. As a result, the gap filling ability is enhanced and no voids are formed. Moreover, since the substrate is rotated a given angle, the deposition thus can be uniformly distributed on the surface of the semiconductor substrate. Besides, as performing the present method does not influence manufacture throughput, the present invention can be put into practice in the related industry.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.